Design and Simulation of Various Approximation Adders to Reduce the Power Consumption

Authors:J.PRAMEELA, M.S.SHAFEE UNNISA SAYYED, DR.S.P.V.SUBBA RAO

0824-0829

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Authors:........................

0830-0834

Implementation of Multirate FIR Filters Through Thread Decomposition

Authors:G.SAIPOOJITHA, M.PRAVEEN KUMAR

0835-0840

Accumulator Based 3-Weight Test Pattern Generation Using VLSI Technology

Authors:N.RAJESHAM, P.LAXMAN

0841-0845

Fault Secure Encoder and Decoder for Memory Applications

Authors:S.SUDHEER BABU, N.PALLAVI

0846-0850

Designing of Data Encryption using Rijndael Algorithm with AES Technique

Authors:KESAVA REDDY.S, D.VASAVI

0851-0853

Mathematical Modeling & FPGA Implementation of Particle Swarm Optimization Algorithm for Routing in VLSI

Authors:GOPATHI SHOBHA, B.NARASIMHA RAO

0854-0858

Adaptive Implementation of Built In Self Repair Scheme for Multiple SRAMs with Advanced Redundancies in a System On-Chip

Authors:RUBEENA AFSHAN, KARTHIK KUMAR

0859-0862

Design Approach to Achieve Reversible Barrel Shifter in Sequential Circuits

Authors:PAMBI MOUNIKA, KARTHIK KUMAR

0863-0867

Improved Synthesis and Design of Pre-computation Parameter Extractors for Low-Power Pre-computation based Content Addressable Memory

Authors:MATURI VEERACHARY, KARTHIK KUMAR

0868-0871